SN74LV74AMPWREP データシート Ti

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CMOS標準ロジックIC

SN74LV74AMPWREP の詳細情報

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型番SN74LV74AMPWREP
メーカーTI
種別CMOS標準ロジックIC
データシートProduct_list_pdf
Family LV/LV-A/LVX/H
JESD-30 Code R-PDSO-G14
JESD-609 Code e4
Length 5 mm
Load Capacitance (CL) 50 pF
Logic IC Type D FLIP-FLOP
Max Frequency@Nom-Sup 45000000 Hz
Max I(ol) 0.012 Amp
Moisture Sensitivity Level 1
Number of Bits 1
Number of Functions 2
Number of Terminals 14
Operating Temperature-Max 125 Cel
Operating Temperature-Min -55 Cel
Output Polarity COMPLEMENTARY
Package Body Material PLASTIC/EPOXY
Package Code TSSOP
Package Equivalence Code TSSOP14,.25
Package Shape RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Packing Method TR
Peak Reflow Temperature (Cel) 260
Power Supplies 3.3 V
Power Supply Current-Max (ICC) 0.02 mA
Prop. Delay@Nom-Sup 18 ns
Propagation Delay (tpd) 23 ns
Qualification Status Not Qualified
Seated Height-Max 1.2 mm
Sub Category FF/Latches
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 2 V
Supply Voltage-Nom (Vsup) 2.5 V
Surface Mount YES
Technology CMOS
Temperature Grade MILITARY
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Form GULL WING
Terminal Pitch 0.65 mm
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Trigger Type POSITIVE EDGE
Width 4.4 mm
fmax-Min 75 MHz
会社名称Texas Instruments Incorporated.
設立1930
資本金USD 816 million
所在地12500 TI Boulevard Dallas, Texas 75243 USA
URLhttp://www.ti.com/

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