OMAP5910JZZG2 データシート Ti

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OMAP5910JZZG2 の詳細情報

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型番OMAP5910JZZG2
メーカーTI
データシートProduct_list_pdf
Additional Feature ALSO REQUIRES 2.75V OR 3.3V SUPPLY
Address Bus Width 25
Barrel Shifter NO
Bit Size 16
Boundary Scan YES
Clock Frequency-Max 13 MHz
External Data Bus Width 16
Format FIXED POINT
Integrated Cache YES
Internal Bus Architecture MULTIPLE
JESD-30 Code S-PBGA-B289
JESD-609 Code e1
Length 12 mm
Low Power Mode YES
Moisture Sensitivity Level 4
Number of DMA Channels 6
Number of Terminals 289
Number of Timers 8
On Chip Program ROM Width 16
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Package Body Material PLASTIC/EPOXY
Package Code TFBGA
Package Equivalence Code BGA289,21X21,20
Package Shape SQUARE
Package Style GRID ARRAY, THIN PROFILE, FINE PITCH Meter
Peak Reflow Temperature (Cel) 260
Power Supplies 1.6,1.8/2.75/3.3 V
Qualification Status Not Qualified
RAM (words) 163840
ROM Programmability MROM
Seated Height-Max 1.2 mm
Sub Category Digital Signal Processors
Supply Voltage-Max 1.675 V
Supply Voltage-Min 1.525 V
Supply Voltage-Nom 1.6 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu)
Terminal Form BALL
Terminal Pitch 0.5 mm
Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 12 mm
uPs/uCs/Peripheral ICs Type DIGITAL SIGNAL PROCESSOR, MIXED
会社名称Texas Instruments Incorporated.
設立1930
資本金USD 816 million
所在地12500 TI Boulevard Dallas, Texas 75243 USA
URLhttp://www.ti.com/

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