CMOS標準ロジックIC|PLL(電圧制御発振器+位相比較器) | 16ピン|パッケージ:CERDIP
| 型番 | CD4046BF3A |
|---|---|
| メーカー | TI |
| 種別 | CMOS標準ロジックIC |
| データシート | ![]() |
| Analog IC - Other Type | PHASE LOCKED LOOP |
| JESD-30 Code | R-CDIP-T16 |
| JESD-609 Code | e0 |
| Length | 19.56 mm |
| Number of Functions | 1 |
| Number of Terminals | 16 |
| Operating Temperature-Max | 125 Cel |
| Operating Temperature-Min | -55 Cel |
| Package Body Material | CERAMIC |
| Package Code | DIP |
| Package Equivalence Code | DIP16,.3 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE Meter |
| Peak Reflow Temperature (Cel) | NOT SPECIFIED |
| Power Supplies | 5/15 V |
| Qualification Status | Not Qualified |
| Screening Level | 38535Q/M;38534H;883B |
| Seated Height-Max | 5.08 mm |
| Sub Category | PLL or Frequency Synthesis Circuits |
| Supply Current-Max (Isup) | 3 mA |
| Supply Voltage-Max (Vsup) | 18 V |
| Supply Voltage-Min (Vsup) | 3 V |
| Supply Voltage-Nom (Vsup) | 5 V |
| Surface Mount | NO |
| Technology | CMOS |
| Temperature Grade | MILITARY |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54 mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
| Width | 7.62 mm |
| 会社名称 | Texas Instruments Incorporated. |
|---|---|
| 設立 | 1930 |
| 資本金 | USD 816 million |
| 所在地 | 12500 TI Boulevard Dallas, Texas 75243 USA |
| URL | http://www.ti.com/ |
CD4046BF3A - TI の商品詳細ページです。