UPD72001L11 データシート

Name: UPD72001L11
Brand: RENESAS
SKU: 310101492-0000-0000-0000

UPD72001L11 - RENESAS の商品詳細ページです。

No Image

２営業日以内に回答いたします

UPD72001L11 の詳細情報

型番	UPD72001L11
メーカー	RENESAS
データシート
Boundary Scan	NO
Bus Compatibility	8080; 8085; 80188; 80186
Clock Frequency-Max	12.5 MHz
Communication Protocol	ASYNC, BIT; SYNC, BYTE; SYNC, HDLC; SYNC, SDLC; BISYNC
Data Encoding/Decoding Method	NRZ; NRZI; BIPH-MARK(FM1); BIPH-SPACE(FM0); BIPH-LEVEL(MANCHESTER)
Data Transfer Rate-Max	0.3125 MBps
External Data Bus Width	8
JESD-30 Code	S-PQCC-J52
JESD-609 Code	e0
Length	19.1262 mm
Low Power Mode	YES
Number of DMA Channels	0
Number of I/O Lines	0
Number of Serial I/Os	2
Number of Terminals	52
On Chip Data RAM Width	0
Operating Temperature-Max	70 Cel
Operating Temperature-Min	-10 Cel
Package Body Material	PLASTIC/EPOXY
Package Code	QCCJ
Package Equivalence Code	LDCC52,.8SQ
Package Shape	SQUARE
Package Style	CHIP CARRIER Meter
Power Supplies	5 V
Qualification Status	Not Qualified
RAM (words)	0
Seated Height-Max	4.6 mm
Sub Category	Other Microprocessor ICs
Supply Current-Max	40 mA
Supply Voltage-Nom	5 V
Surface Mount	YES
Technology	CMOS
Temperature Grade	COMMERCIAL
Terminal Finish	TIN LEAD
Terminal Form	J BEND
Terminal Pitch	1.27 mm
Terminal Position	QUAD
Width	19.1262 mm
uPs/uCs/Peripheral ICs Type	SERIAL IO/COMMUNICATION CONTROLLER, MULTI PROTOCOL