HD74LV00ATELL データシート

Name: HD74LV00ATELL
Brand: RENESAS
SKU: 180014732-0000-0000-0000

HD74LV00ATELL - RENESAS の商品詳細ページです。

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CMOS標準ロジックIC|パッケージ：TSSOP|梱包：テーピング（リール）

HD74LV00ATELL の詳細情報

型番	HD74LV00ATELL
メーカー	RENESAS
種別	CMOS標準ロジックIC
データシート
Family	LV/LV-A/LVX/H
JESD-30 Code	R-PDSO-G14
JESD-609 Code	e0
Length	5 mm
Load Capacitance (CL)	50 pF
Logic IC Type	NAND GATE
Max I(ol)	0.006 Amp
Moisture Sensitivity Level	1
Number of Functions	4
Number of Inputs	2
Number of Terminals	14
Operating Temperature-Max	85 Cel
Operating Temperature-Min	-40 Cel
Package Body Material	PLASTIC/EPOXY
Package Code	TSSOP
Package Equivalence Code	TSSOP14,.25
Package Shape	RECTANGULAR
Package Style	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Packing Method	TR
Peak Reflow Temperature (Cel)	260
Power Supplies	3.3 V
Prop. Delay@Nom-Sup	13 ns
Propagation Delay (tpd)	20 ns
Qualification Status	Not Qualified
Schmitt Trigger	NO
Seated Height-Max	1.1 mm
Sub Category	Gates
Supply Voltage-Max (Vsup)	5.5 V
Supply Voltage-Min (Vsup)	2 V
Supply Voltage-Nom (Vsup)	2.5 V
Surface Mount	YES
Technology	CMOS
Temperature Grade	INDUSTRIAL
Terminal Finish	Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Form	GULL WING
Terminal Pitch	0.65 mm
Terminal Position	DUAL
Time@Peak Reflow Temperature-Max (s)	20
Width	4.4 mm