OR3T55-6PS208-DB データシート Lattice

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OR3T55-6PS208-DB の詳細情報

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型番OR3T55-6PS208-DB
メーカーLATTICE
データシートProduct_list_pdf
Additional Feature TYP GATES = 40000 TO 80000
Clock Frequency-Max 80 MHz
Combinatorial Delay of a CLB-Max 1.32 ns
JESD-30 Code S-PQFP-G208
JESD-609 Code e0
Length 28 mm
Moisture Sensitivity Level 3
Number of CLBs 324
Number of Equivalent Gates 40000
Number of Inputs 167
Number of Logic Cells 2592
Number of Outputs 167
Number of Terminals 208
Operating Temperature-Max 70 Cel
Operating Temperature-Min 0 Cel
Organization 324 CLBS, 40000 GATES
Package Body Material PLASTIC/EPOXY
Package Code HFQFP
Package Equivalence Code HQFP208,1.2SQ,20
Package Shape SQUARE
Package Style FLATPACK Meter
Peak Reflow Temperature (Cel) 225
Power Supplies 3.3 V
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified
Seated Height-Max 4.1 mm
Sub Category Field Programmable Gate Arrays
Supply Voltage-Max 3.6 V
Supply Voltage-Min 3 V
Supply Voltage-Nom 3.3 V
Surface Mount YES
Technology CMOS
Temperature Grade COMMERCIAL
Terminal Finish TIN LEAD
Terminal Form GULL WING
Terminal Pitch 0.5 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 30
Width 28 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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