LC4064ZE-5TN100I データシート Lattice

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LC4064ZE-5TN100I の詳細情報

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型番LC4064ZE-5TN100I
メーカーLATTICE
データシートProduct_list_pdf
Additional Feature YES
Clock Frequency-Max 149 MHz
In-System Programmable YES
JESD-30 Code S-PQFP-G100
JESD-609 Code e3
JTAG BST YES
Length 14 mm
Moisture Sensitivity Level 3
Number of Dedicated Inputs 10
Number of I/O Lines 64
Number of Macro Cells 64
Number of Terminals 100
Organization 10 DEDICATED INPUTS, 64 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code LFQFP
Package Equivalence Code QFP100,.63SQ,20
Package Shape SQUARE
Package Style FLATPACK, LOW PROFILE, FINE PITCH Meter
Peak Reflow Temperature (Cel) 260
Power Supplies 1.8 V
Programmable Logic Type EE PLD
Propagation Delay 5.8 ns
Qualification Status Not Qualified
Seated Height-Max 1.6 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 1.9 V
Supply Voltage-Min 1.7 V
Supply Voltage-Nom 1.8 V
Surface Mount YES
Technology CMOS
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 0.5 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 40
Width 14 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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