LC4064ZC-5MN56I データシート Lattice

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LC4064ZC-5MN56I の詳細情報

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型番LC4064ZC-5MN56I
メーカーLATTICE
データシートProduct_list_pdf
Architecture PAD-TYPE
Clock Frequency-Max 156 MHz
In-System Programmable YES
JESD-30 Code S-PBGA-B56
JESD-609 Code e1
JTAG BST YES
Length 6 mm
Moisture Sensitivity Level 3
Number of Dedicated Inputs 12
Number of I/O Lines 32
Number of Inputs 44
Number of Macro Cells 64
Number of Outputs 32
Number of Product Terms 83
Number of Terminals 56
Operating Temperature-Max 105 Cel
Operating Temperature-Min -40 Cel
Organization 12 DEDICATED INPUTS, 32 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code LFBGA
Package Equivalence Code BGA56,10X10,20
Package Shape SQUARE
Package Style GRID ARRAY, LOW PROFILE, FINE PITCH Meter
Peak Reflow Temperature (Cel) 260
Power Supplies 1.8 V
Programmable Logic Type EE PLD
Propagation Delay 5 ns
Qualification Status Not Qualified
Seated Height-Max 1.35 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 1.9 V
Supply Voltage-Min 1.7 V
Supply Voltage-Nom 1.8 V
Surface Mount YES
Terminal Finish TIN SILVER COPPER
Terminal Form BALL
Terminal Pitch 0.5 mm
Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) 40
Width 6 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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