LA4128V-75TN100E データシート Lattice

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LA4128V-75TN100E の詳細情報

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型番LA4128V-75TN100E
メーカーLATTICE
データシートProduct_list_pdf
Additional Feature YES
Clock Frequency-Max 168 MHz
In-System Programmable YES
JESD-30 Code S-PQFP-G100
JESD-609 Code e3
JTAG BST YES
Length 14 mm
Moisture Sensitivity Level 3
Number of Dedicated Inputs 0
Number of I/O Lines 64
Number of Inputs 64
Number of Macro Cells 128
Number of Outputs 64
Number of Terminals 100
Operating Temperature-Max 125 Cel
Operating Temperature-Min -40 Cel
Organization 0 DEDICATED INPUTS, 64 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code LFQFP
Package Equivalence Code QFP128,.64SQ,16
Package Shape SQUARE
Package Style FLATPACK, LOW PROFILE, FINE PITCH Meter
Peak Reflow Temperature (Cel) 260
Power Supplies 3.3 V
Programmable Logic Type EE PLD
Propagation Delay 8 ns
Qualification Status Not Qualified
Screening Level AEC-Q100
Seated Height-Max 1.6 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 3.6 V
Supply Voltage-Min 3 V
Supply Voltage-Nom 3.3 V
Surface Mount YES
Technology CMOS
Temperature Grade AUTOMOTIVE
Terminal Finish Matte Tin (Sn)
Terminal Form GULL WING
Terminal Pitch 0.5 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 40
Width 14 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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