ISPLSI5512VA-70LB388 データシート Lattice

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ISPLSI5512VA-70LB388 の詳細情報

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型番ISPLSI5512VA-70LB388
メーカーLATTICE
データシートProduct_list_pdf
Additional Feature 512 MACROCELLS
Clock Frequency-Max 45 MHz
In-System Programmable YES
JESD-30 Code S-PBGA-B388
JESD-609 Code e0
JTAG BST YES
Length 35 mm
Moisture Sensitivity Level 3
Number of Dedicated Inputs 0
Number of I/O Lines 288
Number of Macro Cells 512
Number of Terminals 388
Operating Temperature-Max 70 Cel
Operating Temperature-Min -40 Cel
Organization 0 DEDICATED INPUTS, 288 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code BGA
Package Equivalence Code BGA388,26X26,50
Package Shape SQUARE
Package Style GRID ARRAY Meter
Peak Reflow Temperature (Cel) 225
Power Supplies 2.5/3.3,3.3 V
Programmable Logic Type EE PLD
Propagation Delay 19 ns
Qualification Status Not Qualified
Seated Height-Max 3.25 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 3.6 V
Supply Voltage-Min 3 V
Supply Voltage-Nom 3.3 V
Surface Mount YES
Technology CMOS
Temperature Grade COMMERCIAL
Terminal Finish TIN LEAD
Terminal Form BALL
Terminal Pitch 1.27 mm
Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) 30
Width 35 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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