ISPLSI 2064A-125LJN84 データシート Lattice

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ISPLSI 2064A-125LJN84 の詳細情報

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型番ISPLSI 2064A-125LJN84
メーカーLATTICE
データシートProduct_list_pdf
Additional Feature YES
Clock Frequency-Max 100 MHz
In-System Programmable YES
JESD-30 Code S-PQCC-J84
JESD-609 Code e3
JTAG BST NO
Length 29.3116 mm
Moisture Sensitivity Level 4
Number of Dedicated Inputs 0
Number of I/O Lines 64
Number of Macro Cells 64
Number of Terminals 84
Operating Temperature-Max 70 Cel
Operating Temperature-Min 0 Cel
Organization 0 DEDICATED INPUTS, 64 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code QCCJ
Package Equivalence Code LDCC84,1.2SQ
Package Shape SQUARE
Package Style CHIP CARRIER Meter
Peak Reflow Temperature (Cel) 245
Power Supplies 5 V
Programmable Logic Type EE PLD
Propagation Delay 10 ns
Qualification Status Not Qualified
Seated Height-Max 4.572 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 5.25 V
Supply Voltage-Min 4.75 V
Supply Voltage-Nom 5 V
Surface Mount YES
Technology CMOS
Temperature Grade COMMERCIAL
Terminal Finish Matte Tin (Sn)
Terminal Form J BEND
Terminal Pitch 1.27 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 40
Width 29.3116 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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