ISPGAL22V10AV-5LNN データシート Lattice

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ISPGAL22V10AV-5LNN の詳細情報

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型番ISPGAL22V10AV-5LNN
メーカーLATTICE
データシートProduct_list_pdf
Clock Frequency-Max 143 MHz
JESD-30 Code S-XQCC-N32
JESD-609 Code e3
Length 5 mm
Moisture Sensitivity Level 1
Number of Dedicated Inputs 11
Number of I/O Lines 10
Number of Terminals 32
Organization 11 DEDICATED INPUTS, 10 I/O
Output Function MACROCELL
Package Body Material UNSPECIFIED
Package Code HVQCCN
Package Shape SQUARE
Package Style CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE Meter
Peak Reflow Temperature (Cel) 260
Programmable Logic Type EE PLD
Propagation Delay 5 ns
Qualification Status Not Qualified
Seated Height-Max 1 mm
Supply Voltage-Max 3.6 V
Supply Voltage-Min 3 V
Supply Voltage-Nom 3.3 V
Surface Mount YES
Technology CMOS
Terminal Finish MATTE TIN
Terminal Form NO LEAD
Terminal Pitch 0.5 mm
Terminal Position QUAD
Width 5 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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