ISPGAL22V10AC-23LN データシート Lattice

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ISPGAL22V10AC-23LN の詳細情報

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型番ISPGAL22V10AC-23LN
メーカーLATTICE
データシートProduct_list_pdf
Architecture PAL-TYPE
Clock Frequency-Max 303 MHz
JESD-30 Code S-XQCC-N32
JESD-609 Code e0
Length 5 mm
Moisture Sensitivity Level 1
Number of Dedicated Inputs 11
Number of I/O Lines 10
Number of Inputs 22
Number of Outputs 10
Number of Product Terms 132
Number of Terminals 32
Organization 11 DEDICATED INPUTS, 10 I/O
Output Function MACROCELL
Package Body Material UNSPECIFIED
Package Code HVQCCN
Package Equivalence Code LCC32(UNSPEC)
Package Shape SQUARE
Package Style CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE Meter
Peak Reflow Temperature (Cel) 240
Power Supplies 1.8 V
Programmable Logic Type EE PLD
Propagation Delay 2.3 ns
Qualification Status Not Qualified
Seated Height-Max 1 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 1.95 V
Supply Voltage-Min 1.65 V
Supply Voltage-Nom 1.8 V
Surface Mount YES
Technology CMOS
Terminal Finish Matte Tin (Sn)
Terminal Form NO LEAD
Terminal Pitch 0.5 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 40
Width 5 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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