ICE40LP1K-SWG16TR1K Lattice

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ICE40LP1K-SWG16TR1K の詳細情報

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型番ICE40LP1K-SWG16TR1K
メーカーLATTICE
Combinatorial Delay of a CLB-Max 9.36 ns
JESD-30 Code R-PBGA-B16
Length 1.48 mm
Number of CLBs 160
Number of Inputs 10
Number of Logic Cells 1280
Number of Outputs 10
Number of Terminals 16
Operating Temperature-Max 100 Cel
Operating Temperature-Min -40 Cel
Organization 160 CLBS
Package Body Material PLASTIC/EPOXY
Package Code VFBGA
Package Shape RECTANGULAR
Package Style GRID ARRAY, VERY THIN PROFILE, FINE PITCH Meter
Peak Reflow Temperature (Cel) NOT SPECIFIED
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Seated Height-Max 0.491 mm
Supply Voltage-Max 1.26 V
Supply Voltage-Min 1.14 V
Supply Voltage-Nom 1.2 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Form BALL
Terminal Pitch 0.35 mm
Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 1.4 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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