GAL22V10-25LJ データシート Lattice

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GAL22V10-25LJ の詳細情報

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型番GAL22V10-25LJ
メーカーLATTICE
データシートProduct_list_pdf
Additional Feature 10 MACROCELLS; 1 EXTERNAL CLOCK; REGISTER PRELOAD; SHARED INPUT/CLOCK
Architecture PAL-TYPE
Clock Frequency-Max 28.5 MHz
JESD-30 Code R-GDIP-T24
JESD-609 Code e0
Length 11.5062 mm
Moisture Sensitivity Level 1
Number of Dedicated Inputs 11
Number of I/O Lines 10
Number of Inputs 22
Number of Outputs 10
Number of Product Terms 132
Number of Terminals 24
Operating Temperature-Max 75 Cel
Operating Temperature-Min -40 Cel
Organization 11 DEDICATED INPUTS, 10 I/O
Output Function MACROCELL
Package Body Material CERAMIC, GLASS-SEALED
Package Code DIP
Package Equivalence Code DIP24,.3
Package Shape RECTANGULAR
Package Style CHIP CARRIER Meter
Peak Reflow Temperature (Cel) 225
Power Supplies 5 V
Programmable Logic Type EE PLD
Propagation Delay 25 ns
Qualification Status Not Qualified
Seated Height-Max 4.57 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 5.25 V
Supply Voltage-Min 4.75 V
Supply Voltage-Nom 5 V
Surface Mount NO
Technology CMOS
Temperature Grade COMMERCIAL EXTENDED
Terminal Finish TIN LEAD
Terminal Form J BEND
Terminal Pitch 1.27 mm
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 7.62 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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