GAL16V8A-12LJ データシート Lattice

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GAL16V8A-12LJ の詳細情報

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型番GAL16V8A-12LJ
メーカーLATTICE
データシートProduct_list_pdf
Architecture PAL-TYPE
Clock Frequency-Max 48 MHz
JESD-30 Code R-GDIP-T20
JESD-609 Code e0
Length 24.51 mm
Moisture Sensitivity Level 1
Number of Dedicated Inputs 8
Number of I/O Lines 8
Number of Inputs 18
Number of Outputs 8
Number of Product Terms 64
Number of Terminals 20
Operating Temperature-Max 70 Cel
Operating Temperature-Min 0 Cel
Organization 8 DEDICATED INPUTS, 8 I/O
Output Function MACROCELL
Package Body Material CERAMIC, GLASS-SEALED
Package Code DIP
Package Equivalence Code DIP20,.3
Package Shape RECTANGULAR
Package Style CHIP CARRIER Meter
Peak Reflow Temperature (Cel) 225
Power Supplies 5 V
Programmable Logic Type EE PLD
Propagation Delay 12 ns
Qualification Status Not Qualified
Seated Height-Max 5.08 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 5.25 V
Supply Voltage-Min 4.75 V
Supply Voltage-Nom 5 V
Surface Mount NO
Technology CMOS
Temperature Grade COMMERCIAL
Terminal Finish TIN LEAD
Terminal Form J BEND
Terminal Pitch 1.27 mm
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 7.62 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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