GAL16LV8C7LJ データシート Lattice

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GAL16LV8C7LJ の詳細情報

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型番GAL16LV8C7LJ
メーカーLATTICE
データシートProduct_list_pdf
Additional Feature REGISTER PRELOAD; POWER-UP RESET
Architecture PAL-TYPE
Clock Frequency-Max 90.9 MHz
JESD-30 Code S-PQCC-J20
JESD-609 Code e0
Length 8.9662 mm
Moisture Sensitivity Level 1
Number of Dedicated Inputs 8
Number of I/O Lines 8
Number of Inputs 18
Number of Outputs 8
Number of Product Terms 64
Number of Terminals 20
Operating Temperature-Max 75 Cel
Operating Temperature-Min 0 Cel
Organization 8 DEDICATED INPUTS, 8 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code QCCJ
Package Equivalence Code LDCC20,.4SQ
Package Shape SQUARE
Package Style CHIP CARRIER Meter
Peak Reflow Temperature (Cel) 225
Power Supplies 3.3 V
Programmable Logic Type EE PLD
Propagation Delay 7.5 ns
Qualification Status Not Qualified
Seated Height-Max 4.57 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 3.6 V
Supply Voltage-Min 3 V
Supply Voltage-Nom 3.3 V
Surface Mount YES
Technology CMOS
Temperature Grade COMMERCIAL EXTENDED
Terminal Finish MATTE TIN
Terminal Form J BEND
Terminal Pitch 1.27 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 30
Width 8.9662 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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