5962-8984101LA Lattice

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5962-8984101LA の詳細情報

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型番5962-8984101LA
メーカーLATTICE
Additional Feature 1 EXTERNAL CLOCK; REGISTER PRELOAD
Architecture PAL-TYPE
Clock Frequency-Max 22 MHz
JESD-30 Code R-CDIP-T24
JESD-609 Code e0
Length 31.877 mm
Moisture Sensitivity Level 1
Number of Dedicated Inputs 11
Number of I/O Lines 10
Number of Inputs 22
Number of Outputs 10
Number of Product Terms 132
Number of Terminals 24
Operating Temperature-Max 125 Cel
Operating Temperature-Min -55 Cel
Organization 11 DEDICATED INPUTS, 10 I/O
Output Function MACROCELL
Package Body Material CERAMIC, GLASS-SEALED
Package Code DIP
Package Equivalence Code DIP24,.3
Package Shape RECTANGULAR
Package Style IN-LINE Meter
Power Supplies 5 V
Programmable Logic Type EE PLD
Propagation Delay 30 ns
Qualification Status Not Qualified
Screening Level MIL-PRF-38535; MIL-STD-883
Seated Height-Max 5.08 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 5.5 V
Supply Voltage-Min 4.5 V
Supply Voltage-Nom 5 V
Surface Mount NO
Technology CMOS
Temperature Grade MILITARY
Terminal Finish TIN LEAD
Terminal Form THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL
Width 7.62 mm
会社名称Lattice Semiconductor Corporation
設立1983
所在地7th Floor, 111 SW 5th Avenue, Portland OR 97204
URLhttp://www.latticesemi.com/

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