MSM80C85A-2RS Lapis

MSM80C85A-2RS - LAPIS の商品詳細ページです。

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MSM80C85A-2RS の詳細情報

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  • メーカー情報
型番MSM80C85A-2RS
メーカーLAPIS
Address Bus Width 16
Bit Size 8
Boundary Scan NO
Clock Frequency-Max 10 MHz
External Data Bus Width 8
Format FIXED POINT
Integrated Cache NO
JESD-30 Code R-PDIP-T40
JESD-609 Code e0
Length 52 mm
Low Power Mode YES
Number of DMA Channels 0
Number of External Interrupts 5
Number of Serial I/Os 1
Number of Terminals 40
On Chip Data RAM Width 0
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Package Body Material CERAMIC
Package Code DIP
Package Equivalence Code DIP40,.6
Package Shape RECTANGULAR
Package Style IN-LINE Meter
Power Supplies 5 V
Qualification Status Not Qualified
RAM (words) 0
Seated Height-Max 5.15 mm
Speed 5 rpm
Sub Category Microprocessors
Supply Current-Max 20 mA
Supply Voltage-Max 6 V
Supply Voltage-Min 3 V
Supply Voltage-Nom 5 V
Surface Mount NO
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish TIN LEAD
Terminal Form THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL
Width 15.24 mm
uPs/uCs/Peripheral ICs Type MICROPROCESSOR
会社名称ラピスセミコンダクタ株式会社
設立2008年10月1日
資本金4億円
所在地222-8575 神奈川県横浜市港北区新横浜2-4-8
URLhttp://www.lapis-semi.com/

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