| 型番 | EP2C35F484C8N |
|---|---|
| メーカー | INTEL |
| Additional Feature | ALSO REQUIRES 3.3 SUPPLY |
| Clock Frequency-Max | 402.5 MHz |
| JESD-30 Code | S-PBGA-B484 |
| JESD-609 Code | e1 |
| Length | 23 mm |
| Moisture Sensitivity Level | 3 |
| Number of CLBs | 2076 |
| Number of Inputs | 322 |
| Number of Logic Cells | 33216 |
| Number of Outputs | 306 |
| Number of Terminals | 484 |
| Operating Temperature-Max | 85 Cel |
| Operating Temperature-Min | 0 Cel |
| Organization | 2076 CLBS |
| Package Body Material | PLASTIC/EPOXY |
| Package Code | BGA |
| Package Equivalence Code | BGA484,22X22,40 |
| Package Shape | SQUARE |
| Package Style | GRID ARRAY Meter |
| Peak Reflow Temperature (Cel) | 260 |
| Power Supplies | 1.2,1.5/3.3,3.3 V |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Qualification Status | Not Qualified |
| Seated Height-Max | 2.6 mm |
| Sub Category | Field Programmable Gate Arrays |
| Supply Voltage-Max | 1.25 V |
| Supply Voltage-Min | 1.15 V |
| Supply Voltage-Nom | 1.2 V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | OTHER |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Terminal Form | BALL |
| Terminal Pitch | 1 mm |
| Terminal Position | BOTTOM |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Width | 23 mm |
| 会社名称 | Intel Corporation |
|---|---|
| 設立 | 1989 |
| 所在地 | 2200 Mission College Blvd. Santa Clara, CA 95054-1549 USA |
| URL | http://www.intel.com/ |
EP2C35F484C8N - INTEL の商品詳細ページです。