型番 | 7202LA12TP |
---|---|
メーカー | IDT |
Access Time-Max | 12 ns |
Access Time-Max (ns) | 12 |
Additional Feature | RETRANSMIT |
Clock Frequency-Max (MHz) | 50 |
Clock Frequency-Max (fCLK) | 50 MHz |
Cycle Time | 20 ns |
Cycle Time (ns) | 20 |
DLA Qualification | Not Qualified |
J-STD-609 Code | e0 |
JESD-30 Code | R-PDIP-T28 |
JESD-609 Code | e3 |
Length | 34.3 |
Length (mm) | 34.671 |
Memory Density | 9216 bit |
Memory Density (bits) | 9216 |
Memory IC Type | OTHER FIFO |
Memory Organization | 1KX9 |
Memory Width | 9 |
Moisture Sensitivity Level | 1 |
Number of Functions | 1 |
Number of Terminals | 28 |
Number of Words (words) | 1024 |
Number of Words Code | 1K |
Operating Mode | ASYNCHRONOUS |
Operating Temperature-Max (Cel) | 70 |
Operating Temperature-Min (Cel) | 0 |
Output Enable | NO |
Package Body Material | PLASTIC/EPOXY |
Package Code | DIP |
Package Equivalence Code | DIP28,.3 |
Package Shape | RECTANGULAR |
Package Style | IN-LINE Meter |
Parallel/Serial | PARALLEL |
Peak Reflow Temperature (Cel) | 245 |
Power Supplies (V) | 5 |
Seated Height-Max (mm) | 4.572 |
Standby Current-Max (A) | 0.0005 |
Sub Category | FIFOs |
Supply Current-Max (mA) | 80 |
Supply Voltage-Max (V) | 5.5 |
Supply Voltage-Min (V) | 4.5 |
Supply Voltage-Nom (V) | 5 |
Surface Mount | NO |
Technology | CMOS |
Temperature Grade | COMMERCIAL |
Terminal Finish | MATTE TIN |
Terminal Form | THROUGH-HOLE |
Terminal Pitch (mm) | 2.54 |
Terminal Position | DUAL |
Width (mm) | 7.62 |
会社名称 | Integrated Device Technology, Inc. |
---|---|
設立 | 1980 |
所在地 | 6024 Silver Creek Valley Road, San Jose, CA 95138 USA |
URL | http://www.idt.com/ |
7202LA12TP - IDT の商品詳細ページです。