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7200L50J
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7200L50J の詳細情報
- 仕様・詳細
- メーカー情報
| 型番 | 7200L50J |
|---|---|
| メーカー | IDT |
| Access Time-Max | 50 ns |
| Access Time-Max (ns) | 50 |
| Additional Feature | RETRANSMIT |
| Clock Frequency-Max (MHz) | 15 |
| Cycle Time | 65 ns |
| Cycle Time (ns) | 65 |
| DLA Qualification | Not Qualified |
| J-STD-609 Code | e0 |
| JESD-30 Code | R-PQCC-J32 |
| JESD-609 Code | e0 |
| Length | 13.97 mm |
| Length (mm) | 13.97 |
| Memory Density | 2304 bit |
| Memory Density (bits) | 2304 |
| Memory IC Type | OTHER FIFO |
| Memory Organization | 256X9 |
| Memory Width | 9 |
| Moisture Sensitivity Level | 1 |
| Number of Functions | 1 |
| Number of Terminals | 32 |
| Number of Words | 256 words |
| Number of Words (words) | 256 |
| Number of Words Code | 256 |
| Operating Mode | ASYNCHRONOUS |
| Operating Temperature-Max | 70 Cel |
| Operating Temperature-Max (Cel) | 70 |
| Operating Temperature-Min (Cel) | 0 |
| Output Enable | NO |
| Package Body Material | PLASTIC/EPOXY |
| Package Code | QCCJ |
| Package Equivalence Code | LDCC32,.5X.6 |
| Package Shape | RECTANGULAR |
| Package Style | CHIP CARRIER Meter |
| Parallel/Serial | PARALLEL |
| Peak Reflow Temperature (Cel) | 225 |
| Power Supplies (V) | 5 |
| Standby Current-Max (A) | 0.0005 |
| Sub Category | FIFOs |
| Supply Current-Max (mA) | 80 |
| Supply Voltage-Max (V) | 5.5 |
| Supply Voltage-Min (V) | 4.5 |
| Supply Voltage-Nom (V) | 5 |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | COMMERCIAL |
| Terminal Finish | Matte Tin (Sn) - annealed |
| Terminal Form | J BEND |
| Terminal Pitch (mm) | 1.27 |
| Terminal Position | QUAD |
| Time@Peak Reflow Temperature-Max (s) | 20 |
| 会社名称 | Integrated Device Technology, Inc. |
|---|---|
| 設立 | 1980 |
| 所在地 | 6024 Silver Creek Valley Road, San Jose, CA 95138 USA |
| URL | http://www.idt.com/ |
7200L50Jのレビュー
7200L50J のご注文について
050-3612-7934
045-263-9989
7200L50J - IDT の商品詳細ページです。