高速CMOS標準ロジックIC|パッケージ: Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide | Lead free
型番 | MM74HCT08N |
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メーカー | FAIRCHILD |
種別 | 高速CMOS標準ロジックIC |
データシート | ![]() |
Family | HCT |
JESD-30 Code | R-PDIP-T14 |
JESD-609 Code | e0 |
Length | 19 mm |
Load Capacitance (CL) | 50 pF |
Logic IC Type | AND GATE |
Max I(ol) | 0.004 Amp |
Number of Functions | 4 |
Number of Inputs | 2 |
Number of Terminals | 14 |
Operating Temperature-Max | 85 Cel |
Operating Temperature-Min | -40 Cel |
Package Body Material | PLASTIC/EPOXY |
Package Code | DIP |
Package Equivalence Code | DIP14,.3 |
Package Shape | RECTANGULAR |
Package Style | IN-LINE Meter |
Packing Method | TR |
Peak Reflow Temperature (Cel) | NOT SPECIFIED |
Power Supplies | 5 V |
Power Supply Current-Max (ICC) | 1.5 mA |
Prop. Delay@Nom-Sup | 23 ns |
Propagation Delay (tpd) | 23 ns |
Qualification Status | Not Qualified |
Schmitt Trigger | NO |
Seated Height-Max | 3.65 mm |
Sub Category | Gates |
Supply Voltage-Max (Vsup) | 5.5 V |
Supply Voltage-Min (Vsup) | 4.5 V |
Supply Voltage-Nom (Vsup) | 5 V |
Surface Mount | NO |
Technology | CMOS |
Temperature Grade | INDUSTRIAL |
Terminal Finish | MATTE TIN |
Terminal Form | THROUGH-HOLE |
Terminal Pitch | 2.54 mm |
Terminal Position | DUAL |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
Width | 7.62 mm |
会社名称 | Fairchild Semiconductor Corporation |
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設立 | 1957 |
所在地 | 3030 Orchard Parkway San Jose, CA 95134 United States |
URL | http://www.fairchildsemi.com/ |
MM74HCT08N - FAIRCHILD の商品詳細ページです。