MM74HC280N Fairchild

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高速CMOS標準ロジックIC|パッケージ： Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide | Lead free

MM74HC280N の詳細情報

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型番MM74HC280N
メーカーFAIRCHILD
種別高速CMOS標準ロジックIC
Additional Feature ODD/EVEN PARITY GENERATOR
Family HC/UH
JESD-30 Code R-PDIP-T14
JESD-609 Code e0
Length 19.18 mm
Load Capacitance (CL) 50 pF
Logic IC Type PARITY GENERATOR/CHECKER
Number of Bits 9
Number of Functions 1
Number of Terminals 14
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Output Polarity COMPLEMENTARY
Package Body Material PLASTIC/EPOXY
Package Code DIP
Package Equivalence Code DIP14,.3
Package Shape RECTANGULAR
Package Style IN-LINE Meter
Power Supplies 2/6 V
Propagation Delay (tpd) 52 ns
Qualification Status Not Qualified
Seated Height-Max 5.08 mm
Sub Category Arithmetic Circuits
Supply Voltage-Max (Vsup) 6 V
Supply Voltage-Min (Vsup) 2 V
Supply Voltage-Nom (Vsup) 5 V
Surface Mount NO
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish TIN LEAD
Terminal Form THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL
Width 7.62 mm
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

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