MM74HC126N データシート Fairchild

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高速CMOS標準ロジックIC|パッケージ： Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide | Lead free

MM74HC126N の詳細情報

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型番MM74HC126N
メーカーFAIRCHILD
種別高速CMOS標準ロジックIC
データシートProduct_list_pdf
Additional Feature ENABLE TIME @ RL=1K
Control Type ENABLE HIGH
Family HC/UH
JESD-30 Code R-PDIP-T14
JESD-609 Code e0
Length 19.18 mm
Load Capacitance (CL) 50 pF
Logic IC Type BUFFER
Max I(ol) 0.006 Amp
Number of Bits 1
Number of Functions 1
Number of Inputs 1
Number of Ports 2
Number of Terminals 14
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Output Characteristics 3-STATE
Output Polarity TRUE
Package Body Material PLASTIC/EPOXY
Package Code DIP
Package Equivalence Code DIP14,.3
Package Shape RECTANGULAR
Package Style IN-LINE Meter
Packing Method RAIL
Power Supplies 2/6 V
Power Supply Current-Max (ICC) 0.08 mA
Prop. Delay@Nom-Sup 25 ns
Propagation Delay (tpd) 163 ns
Qualification Status Not Qualified
Schmitt Trigger NO
Seated Height-Max 5.08 mm
Sub Category Bus Driver/Transceivers
Supply Voltage-Max (Vsup) 6 V
Supply Voltage-Min (Vsup) 2 V
Supply Voltage-Nom (Vsup) 4.5 V
Surface Mount NO
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish MATTE TIN
Terminal Form THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL
Width 7.62 mm
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

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