DM74AS00N データシート Fairchild

DM74AS00N - FAIRCHILD の商品詳細ページです。

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パッケージ: Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

DM74AS00N の詳細情報

  • 仕様・詳細
  • メーカー情報
型番DM74AS00N
メーカーFAIRCHILD
種別CMOS標準ロジックIC
データシートProduct_list_pdf
Family AS
JESD-30 Code R-PDIP-T14
JESD-609 Code e0
Length 19.18 mm
Load Capacitance (CL) 50 pF
Logic IC Type NAND GATE
Max I(ol) 0.02 Amp
Number of Functions 4
Number of Inputs 2
Number of Terminals 14
Operating Temperature-Max 70 Cel
Operating Temperature-Min 0 Cel
Package Body Material PLASTIC/EPOXY
Package Code DIP
Package Equivalence Code DIP14,.3
Package Shape RECTANGULAR
Package Style IN-LINE Meter
Peak Reflow Temperature (Cel) NOT SPECIFIED
Power Supplies 5 V
Power Supply Current-Max (ICC) 17.4 mA
Prop. Delay@Nom-Sup 4.5 ns
Propagation Delay (tpd) 4 ns
Qualification Status Not Qualified
Schmitt Trigger NO
Seated Height-Max 5.08 mm
Sub Category Gates
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 4.5 V
Supply Voltage-Nom (Vsup) 5 V
Surface Mount NO
Technology TTL
Temperature Grade COMMERCIAL
Terminal Finish Tin/Lead (Sn/Pb)
Terminal Form THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 7.62 mm
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

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