アドバンストLS-TTL トランジスタ・トランジスタ・ロジック|パッケージ: Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
| 型番 | DM74ALS04BN |
|---|---|
| メーカー | FAIRCHILD |
| 種別 | CMOS標準ロジックIC |
| データシート | ![]() |
| Family | ALS |
| JESD-30 Code | R-PDIP-T14 |
| JESD-609 Code | e0 |
| Length | 19.18 mm |
| Load Capacitance (CL) | 50 pF |
| Logic IC Type | INVERTER |
| Max I(ol) | 0.008 Amp |
| Number of Functions | 6 |
| Number of Inputs | 1 |
| Number of Terminals | 14 |
| Operating Temperature-Max | 70 Cel |
| Operating Temperature-Min | 0 Cel |
| Package Body Material | PLASTIC/EPOXY |
| Package Code | DIP |
| Package Equivalence Code | DIP14,.3 |
| Package Shape | RECTANGULAR |
| Package Style | IN-LINE Meter |
| Power Supplies | 5 V |
| Power Supply Current-Max (ICC) | 4.2 mA |
| Prop. Delay@Nom-Sup | 11 ns |
| Propagation Delay (tpd) | 8 ns |
| Qualification Status | Not Qualified |
| Schmitt Trigger | NO |
| Seated Height-Max | 5.08 mm |
| Sub Category | Gates |
| Supply Voltage-Max (Vsup) | 5.5 V |
| Supply Voltage-Min (Vsup) | 4.5 V |
| Supply Voltage-Nom (Vsup) | 5 V |
| Surface Mount | NO |
| Technology | TTL |
| Temperature Grade | COMMERCIAL |
| Terminal Finish | MATTE TIN |
| Terminal Form | THROUGH-HOLE |
| Terminal Pitch | 2.54 mm |
| Terminal Position | DUAL |
| Width | 7.62 mm |
| 会社名称 | Fairchild Semiconductor Corporation |
|---|---|
| 設立 | 1957 |
| 所在地 | 3030 Orchard Parkway San Jose, CA 95134 United States |
| URL | http://www.fairchildsemi.com/ |
DM74ALS04BN - FAIRCHILD の商品詳細ページです。