パッケージ: Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
型番 | CD4724BCM |
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メーカー | FAIRCHILD |
データシート | ![]() |
Additional Feature | 1:8 DMUX FOLLOWED BY LATCH |
Family | 4000/14000/40000 |
JESD-30 Code | R-PDSO-G16 |
JESD-609 Code | e0 |
Length | 9.9 mm |
Load Capacitance (CL) | 50 pF |
Logic IC Type | D LATCH |
Moisture Sensitivity Level | 1 |
Number of Bits | 1 |
Number of Functions | 1 |
Number of Terminals | 16 |
Operating Temperature-Max | 85 Cel |
Operating Temperature-Min | -55 Cel |
Output Polarity | TRUE |
Package Body Material | PLASTIC/EPOXY |
Package Code | SOP |
Package Equivalence Code | SOP16,.25 |
Package Shape | RECTANGULAR |
Package Style | SMALL OUTLINE Meter |
Packing Method | TR |
Peak Reflow Temperature (Cel) | 260 |
Power Supplies | 3/15 V |
Prop. Delay@Nom-Sup | 400 ns |
Propagation Delay (tpd) | 400 ns |
Qualification Status | Not Qualified |
Seated Height-Max | 1.75 mm |
Sub Category | FF/Latches |
Supply Voltage-Max (Vsup) | 15 V |
Supply Voltage-Min (Vsup) | 3 V |
Supply Voltage-Nom (Vsup) | 5 V |
Surface Mount | YES |
Technology | CMOS |
Temperature Grade | INDUSTRIAL |
Terminal Finish | MATTE TIN |
Terminal Form | GULL WING |
Terminal Pitch | 1.27 mm |
Terminal Position | DUAL |
Trigger Type | LOW LEVEL |
Width | 3.9 mm |
会社名称 | Fairchild Semiconductor Corporation |
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設立 | 1957 |
所在地 | 3030 Orchard Parkway San Jose, CA 95134 United States |
URL | http://www.fairchildsemi.com/ |
CD4724BCM - FAIRCHILD の商品詳細ページです。