CMOS標準ロジックIC|2回路4chアナログ・マルチプレクサ/デマルチプレクサ(アナログスイッチ) | 16ピン|パッケージ: Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
型番 | CD4052BCNNL |
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メーカー | FAIRCHILD |
種別 | CMOS標準ロジックIC |
Analog IC - Other Type | DIFFERENTIAL MULTIPLEXER |
JESD-30 Code | R-PDIP-T16 |
JESD-609 Code | e3 |
Length | 19.305 mm |
Neg Supply Voltage-Max (Vsup) | 0 V |
Neg Supply Voltage-Min (Vsup) | 0 V |
Neg Supply Voltage-Nom (Vsup) | 0 V |
Number of Channels | 4 |
Number of Functions | 1 |
Number of Terminals | 16 |
On-state Resistance Match-Nom | 10 ohm |
On-state Resistance-Max (Ron) | 1050 ohm |
Operating Temperature-Max | 125 Cel |
Operating Temperature-Min | -55 Cel |
Package Body Material | PLASTIC/EPOXY |
Package Code | DIP |
Package Equivalence Code | DIP16,.3 |
Package Shape | RECTANGULAR |
Package Style | IN-LINE Meter |
Power Supplies | 5/15 V |
Qualification Status | Not Qualified |
Seated Height-Max | 5.08 mm |
Sub Category | Multiplexer or Switches |
Supply Voltage-Max (Vsup) | 15 V |
Supply Voltage-Min (Vsup) | 5 V |
Supply Voltage-Nom (Vsup) | 5 V |
Surface Mount | NO |
Switch-off Time-Max | 420 ns |
Switch-on Time-Max | 1200 ns |
Switching | BREAK-BEFORE-MAKE V |
Technology | CMOS |
Temperature Grade | MILITARY |
Terminal Finish | MATTE TIN |
Terminal Form | THROUGH-HOLE |
Terminal Pitch | 2.54 mm |
Terminal Position | DUAL |
Width | 7.62 mm |
会社名称 | Fairchild Semiconductor Corporation |
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設立 | 1957 |
所在地 | 3030 Orchard Parkway San Jose, CA 95134 United States |
URL | http://www.fairchildsemi.com/ |
CD4052BCNNL - FAIRCHILD の商品詳細ページです。