CD4027BCN データシート

CD4027BCN - FAIRCHILD の商品詳細ページです。

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CMOS標準ロジックIC|2回路JK-フリップフロップ | 16ピン|パッケージ： Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide

CD4027BCN の詳細情報

型番	CD4027BCN
メーカー	FAIRCHILD
種別	CMOS標準ロジックIC
データシート
Family	4000/14000/40000
JESD-30 Code	R-PDIP-T16
JESD-609 Code	e0
Length	19.305 mm
Load Capacitance (CL)	50 pF
Logic IC Type	J-K FLIP-FLOP
Max Frequency@Nom-Sup	2500000 Hz
Number of Bits	2
Number of Functions	2
Number of Terminals	16
Operating Temperature-Max	85 Cel
Operating Temperature-Min	-55 Cel
Output Polarity	COMPLEMENTARY
Package Body Material	PLASTIC/EPOXY
Package Code	DIP
Package Equivalence Code	DIP16,.3
Package Shape	RECTANGULAR
Package Style	IN-LINE Meter
Peak Reflow Temperature (Cel)	NOT SPECIFIED
Power Supplies	3/15 V
Propagation Delay (tpd)	400 ns
Qualification Status	Not Qualified
Seated Height-Max	5.08 mm
Sub Category	FF/Latches
Supply Voltage-Max (Vsup)	15 V
Supply Voltage-Min (Vsup)	3 V
Supply Voltage-Nom (Vsup)	5 V
Surface Mount	NO
Technology	CMOS
Temperature Grade	INDUSTRIAL
Terminal Finish	MATTE TIN
Terminal Form	THROUGH-HOLE
Terminal Pitch	2.54 mm
Terminal Position	DUAL
Time@Peak Reflow Temperature-Max (s)	NOT SPECIFIED
Trigger Type	MASTER-SLAVE
Width	7.62 mm
fmax-Min	2.5 MHz

会社名称	Fairchild Semiconductor Corporation
設立	1957
所在地	3030 Orchard Parkway San Jose, CA 95134 United States
URL	http://www.fairchildsemi.com/