CMOS標準ロジックIC|14ステージ2進非同期カウンタ | 16ピン|パッケージ: Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
型番 | CD4020BCN |
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メーカー | FAIRCHILD |
種別 | CMOS標準ロジックIC |
Additional Feature | OUTPUTS FROM 12 STAGES AVAILABLE |
Count Direction | UP |
Family | 4000/14000/40000 |
JESD-30 Code | R-PDIP-T16 |
JESD-609 Code | e0 |
Length | 19.305 mm |
Load Capacitance (CL) | 50 pF |
Load/Preset Input | NO |
Logic IC Type | BINARY COUNTER |
Max Frequency@Nom-Sup | 1500000 Hz |
Mode of Operation | ASYNCHRONOUS |
Number of Bits | 14 |
Number of Functions | 1 |
Number of Terminals | 16 |
Operating Temperature-Max | 85 Cel |
Operating Temperature-Min | -55 Cel |
Package Body Material | PLASTIC/EPOXY |
Package Code | DIP |
Package Equivalence Code | DIP16,.3 |
Package Shape | RECTANGULAR |
Package Style | IN-LINE Meter |
Peak Reflow Temperature (Cel) | NOT SPECIFIED |
Power Supplies | 5/15 V |
Power Supply Current-Max (ICC) | 0.0003 mA |
Prop. Delay@Nom-Sup | 550 ns |
Propagation Delay (tpd) | 550 ns |
Qualification Status | Not Qualified |
Seated Height-Max | 5.08 mm |
Sub Category | Counters |
Supply Voltage-Max (Vsup) | 15 V |
Supply Voltage-Min (Vsup) | 3 V |
Supply Voltage-Nom (Vsup) | 5 V |
Surface Mount | NO |
Technology | CMOS |
Temperature Grade | INDUSTRIAL |
Terminal Finish | Tin/Lead (Sn/Pb) |
Terminal Form | THROUGH-HOLE |
Terminal Pitch | 2.54 mm |
Terminal Position | DUAL |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
Trigger Type | NEGATIVE EDGE |
Width | 7.62 mm |
fmax-Min | 5 MHz |
会社名称 | Fairchild Semiconductor Corporation |
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設立 | 1957 |
所在地 | 3030 Orchard Parkway San Jose, CA 95134 United States |
URL | http://www.fairchildsemi.com/ |
CD4020BCN - FAIRCHILD の商品詳細ページです。