74VHC112MX データシート Fairchild

74VHC112MX - FAIRCHILD の商品詳細ページです。

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CMOS標準ロジックIC

74VHC112MX の詳細情報

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型番74VHC112MX
メーカーFAIRCHILD
種別CMOS標準ロジックIC
データシートProduct_list_pdf
Family AHC/VHC
JESD-30 Code R-PDSO-G16
JESD-609 Code e3
Length 9.9 mm
Load Capacitance (CL) 50 pF
Logic IC Type J-K FLIP-FLOP
Max Frequency@Nom-Sup 110000000 Hz
Max I(ol) 0.008 Amp
Moisture Sensitivity Level 1
Number of Bits 2
Number of Functions 2
Number of Terminals 16
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Output Polarity COMPLEMENTARY
Package Body Material PLASTIC/EPOXY
Package Code SOP
Package Equivalence Code SOP16,.25
Package Shape RECTANGULAR
Package Style SMALL OUTLINE Meter
Packing Method TR
Peak Reflow Temperature (Cel) 260
Power Supplies 2/5.5 V
Prop. Delay@Nom-Sup 12 ns
Propagation Delay (tpd) 12 ns
Qualification Status Not Qualified
Seated Height-Max 1.75 mm
Sub Category FF/Latches
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 2 V
Supply Voltage-Nom (Vsup) 3.3 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 1.27 mm
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 30
Trigger Type NEGATIVE EDGE
Width 3.9 mm
fmax-Min 110 MHz
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

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