CMOS標準ロジックIC|パッケージ: Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
| 型番 | 74LVXC4245WM |
|---|---|
| メーカー | FAIRCHILD |
| 種別 | CMOS標準ロジックIC |
| データシート | ![]() |
| Additional Feature | 4.5V TO 5.5V SUPPLY FOR PORT A; 2.7V TO 5.5V SUPPLY FOR PORT B |
| Control Type | COMMON CONTROL |
| Count Direction | BIDIRECTIONAL |
| Family | LV/LV-A/LVX/H |
| JESD-30 Code | R-PDSO-G24 |
| JESD-609 Code | e0 |
| Length | 15.4 mm |
| Load Capacitance (CL) | 50 pF |
| Logic IC Type | BUS TRANSCEIVER |
| Max I(ol) | 0.024 Amp |
| Moisture Sensitivity Level | 1 |
| Number of Bits | 8 |
| Number of Functions | 1 |
| Number of Ports | 2 |
| Number of Terminals | 24 |
| Operating Temperature-Max | 85 Cel |
| Operating Temperature-Min | -40 Cel |
| Output Characteristics | 3-STATE |
| Output Polarity | TRUE |
| Package Body Material | PLASTIC/EPOXY |
| Package Code | SOP |
| Package Equivalence Code | SOP24,.4 |
| Package Shape | RECTANGULAR |
| Package Style | SMALL OUTLINE Meter |
| Packing Method | TR |
| Peak Reflow Temperature (Cel) | 260 |
| Power Supplies | 3/5,5 V |
| Power Supply Current-Max (ICC) | 50 mA |
| Prop. Delay@Nom-Sup | 8 ns |
| Propagation Delay (tpd) | 7 ns |
| Qualification Status | Not Qualified |
| Seated Height-Max | 2.65 mm |
| Sub Category | Bus Driver/Transceivers |
| Supply Voltage-Max (Vsup) | 5.5 V |
| Supply Voltage-Min (Vsup) | 2.7 V |
| Supply Voltage-Nom (Vsup) | 3.3 V |
| Surface Mount | YES |
| Technology | CMOS |
| Temperature Grade | INDUSTRIAL |
| Terminal Finish | MATTE TIN |
| Terminal Form | GULL WING |
| Terminal Pitch | 1.27 mm |
| Terminal Position | DUAL |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Translation | 3/5V & 5V |
| Width | 7.5 mm |
| 会社名称 | Fairchild Semiconductor Corporation |
|---|---|
| 設立 | 1957 |
| 所在地 | 3030 Orchard Parkway San Jose, CA 95134 United States |
| URL | http://www.fairchildsemi.com/ |
74LVXC4245WM - FAIRCHILD の商品詳細ページです。