74LVTH273MTC データシート Fairchild

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CMOS標準ロジックIC|パッケージ： Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide | Lead free

74LVTH273MTC の詳細情報

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型番74LVTH273MTC
メーカーFAIRCHILD
種別CMOS標準ロジックIC
データシートProduct_list_pdf
Family LVT
JESD-30 Code R-PDSO-G20
JESD-609 Code e3
Length 6.5 mm
Load Capacitance (CL) 50 pF
Logic IC Type D FLIP-FLOP
Max Frequency@Nom-Sup 150000000 Hz
Max I(ol) 0.064 Amp
Moisture Sensitivity Level 1
Number of Bits 8
Number of Functions 1
Number of Terminals 20
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Output Polarity TRUE
Package Body Material PLASTIC/EPOXY
Package Code TSSOP
Package Equivalence Code TSSOP20,.25
Package Shape RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Meter
Packing Method RAIL
Power Supplies 3.3 V
Prop. Delay@Nom-Sup 4.9 ns
Propagation Delay (tpd) 5.5 ns
Qualification Status Not Qualified
Seated Height-Max 1.2 mm
Sub Category FF/Latches
Supply Voltage-Max (Vsup) 3.6 V
Supply Voltage-Min (Vsup) 2.7 V
Supply Voltage-Nom (Vsup) 3 V
Surface Mount YES
Technology BICMOS
Temperature Grade INDUSTRIAL
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 0.65 mm
Terminal Position DUAL
Trigger Type POSITIVE EDGE
Width 4.4 mm
fmax-Min 150 MHz
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

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