74LVT374WM データシート Fairchild

74LVT374WM - FAIRCHILD の商品詳細ページです。

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CMOS標準ロジックIC|パッケージ: Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

74LVT374WM の詳細情報

  • 仕様・詳細
  • メーカー情報
型番74LVT374WM
メーカーFAIRCHILD
種別CMOS標準ロジックIC
データシートProduct_list_pdf
Additional Feature 5V TOLERANT INPUTS & OUTPUTS; BUS HOLD INPUTS ELIMINATE THE NEED FOR EXTERNAL PULL-UP RESISTORS
Family LVT
JESD-30 Code R-PDSO-G20
JESD-609 Code e0
Length 12.8 mm
Load Capacitance (CL) 50 pF
Logic IC Type BUS DRIVER
Max Frequency@Nom-Sup 160000000 Hz
Max I(ol) 0.064 Amp
Moisture Sensitivity Level 1
Number of Bits 8
Number of Functions 1
Number of Ports 2
Number of Terminals 20
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Output Characteristics 3-STATE
Output Polarity TRUE
Package Body Material PLASTIC/EPOXY
Package Code SOP
Package Equivalence Code SOP20,.4
Package Shape RECTANGULAR
Package Style SMALL OUTLINE Meter
Packing Method RAIL
Peak Reflow Temperature (Cel) NOT SPECIFIED
Power Supplies 3.3 V
Power Supply Current-Max (ICC) 12 mA
Prop. Delay@Nom-Sup 4.5 ns
Propagation Delay (tpd) 5.2 ns
Qualification Status Not Qualified
Seated Height-Max 2.642 mm
Sub Category FF/Latches
Supply Voltage-Max (Vsup) 3.6 V
Supply Voltage-Min (Vsup) 2.7 V
Supply Voltage-Nom (Vsup) 3.3 V
Surface Mount YES
Technology BICMOS
Temperature Grade INDUSTRIAL
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 1.27 mm
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Trigger Type POSITIVE EDGE
Width 7.493 mm
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

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