74LCX112M データシート Fairchild

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低電圧CMOSロジックIC|パッケージ： Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

74LCX112M の詳細情報

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型番74LCX112M
メーカーFAIRCHILD
種別低電圧CMOSロジックIC
データシートProduct_list_pdf
Family LVC/LCX/Z
JESD-30 Code R-PDSO-G16
JESD-609 Code e0
Length 5 mm
Load Capacitance (CL) 50 pF
Logic IC Type J-K FLIP-FLOP
Max Frequency@Nom-Sup 150000000 Hz
Max I(ol) 0.024 Amp
Moisture Sensitivity Level 1
Number of Bits 2
Number of Functions 2
Number of Terminals 16
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Output Polarity COMPLEMENTARY
Package Body Material PLASTIC/EPOXY
Package Code SOP
Package Equivalence Code SOP16,.25
Package Shape RECTANGULAR
Package Style SMALL OUTLINE Meter
Packing Method RAIL
Peak Reflow Temperature (Cel) 260
Power Supplies 3.3 V
Prop. Delay@Nom-Sup 7 ns
Propagation Delay (tpd) 9 ns
Qualification Status Not Qualified
Seated Height-Max 1.1 mm
Sub Category FF/Latches
Supply Voltage-Max (Vsup) 3.6 V
Supply Voltage-Min (Vsup) 2 V
Supply Voltage-Nom (Vsup) 2.5 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 0.65 mm
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 30
Trigger Type NEGATIVE EDGE
Width 3.9 mm
fmax-Min 150 MHz
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

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