74ACTQ02SJ データシート Fairchild

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Advanced CMOSロジックIC|パッケージ： Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74ACTQ02SJ の詳細情報

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型番74ACTQ02SJ
メーカーFAIRCHILD
種別Advanced CMOSロジックIC
データシートProduct_list_pdf
Family ACT
JESD-30 Code R-PDSO-G14
JESD-609 Code e3
Length 10.2 mm
Load Capacitance (CL) 50 pF
Logic IC Type NOR GATE
Max I(ol) 0.024 Amp
Moisture Sensitivity Level 1
Number of Functions 4
Number of Inputs 2
Number of Terminals 14
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Package Body Material PLASTIC/EPOXY
Package Code SOP
Package Equivalence Code SOP14,.3
Package Shape RECTANGULAR
Package Style SMALL OUTLINE Meter
Packing Method RAIL
Power Supplies 5 V
Prop. Delay@Nom-Sup 8 ns
Propagation Delay (tpd) 8 ns
Qualification Status Not Qualified
Schmitt Trigger NO
Seated Height-Max 2.1 mm
Sub Category Gates
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 4.5 V
Supply Voltage-Nom (Vsup) 5 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 1.27 mm
Terminal Position DUAL
Width 5.3 mm
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

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