74ACT821SPC データシート Fairchild

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Advanced CMOSロジックIC|パッケージ： Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide | Lead free

74ACT821SPC の詳細情報

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型番74ACT821SPC
メーカーFAIRCHILD
種別Advanced CMOSロジックIC
データシートProduct_list_pdf
Family ACT
JESD-30 Code R-PDIP-T24
JESD-609 Code e0
Length 31.915 mm
Load Capacitance (CL) 50 pF
Logic IC Type BUS DRIVER
Max Frequency@Nom-Sup 110000000 Hz
Max I(ol) 0.024 Amp
Number of Bits 10
Number of Functions 1
Number of Ports 2
Number of Terminals 24
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Output Characteristics 3-STATE
Output Polarity TRUE
Package Body Material PLASTIC/EPOXY
Package Code DIP
Package Equivalence Code DIP24,.3
Package Shape RECTANGULAR
Package Style IN-LINE Meter
Power Supplies 5 V
Propagation Delay (tpd) 10.5 ns
Qualification Status Not Qualified
Seated Height-Max 5.08 mm
Sub Category FF/Latches
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 4.5 V
Supply Voltage-Nom (Vsup) 5 V
Surface Mount NO
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish MATTE TIN
Terminal Form THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL
Trigger Type POSITIVE EDGE
Width 7.62 mm
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

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