74ACT520SJ データシート Fairchild

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Advanced CMOSロジックIC|パッケージ: Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74ACT520SJ の詳細情報

  • 仕様・詳細
  • メーカー情報
型番74ACT520SJ
メーカーFAIRCHILD
種別Advanced CMOSロジックIC
データシートProduct_list_pdf
Additional Feature WITH PULLUP RESISTORS ON B INPUTS
Family ACT
JESD-30 Code R-PDSO-G20
JESD-609 Code e3
Length 12.6 mm
Load Capacitance (CL) 50 pF
Logic IC Type IDENTITY COMPARATOR
Moisture Sensitivity Level 1
Number of Bits 8
Number of Functions 1
Number of Terminals 20
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Output Polarity INVERTED
Package Body Material PLASTIC/EPOXY
Package Code SOP
Package Equivalence Code SOP20,.3
Package Shape RECTANGULAR
Package Style SMALL OUTLINE Meter
Power Supplies 5 V
Propagation Delay (tpd) 11.5 ns
Qualification Status Not Qualified
Seated Height-Max 2.1 mm
Sub Category Arithmetic Circuits
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 4.5 V
Supply Voltage-Nom (Vsup) 5 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 1.27 mm
Terminal Position DUAL
Width 5.3 mm
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

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