Advanced CMOSロジックIC|パッケージ: Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide | Lead free
型番 | 74ACT2708PC |
---|---|
メーカー | FAIRCHILD |
種別 | Advanced CMOSロジックIC |
データシート | ![]() |
Access Time-Max | 34.5 ns |
Additional Feature | 64X9 DUAL PORT RAM |
Clock Frequency-Max (fCLK) | 35 MHz |
Cycle Time | 28.57 ns |
JESD-30 Code | R-PDIP-T28 |
JESD-609 Code | e0 |
Length | 35.725 mm |
Memory Density | 576 bit |
Memory IC Type | OTHER FIFO |
Memory Width | 9 |
Number of Functions | 1 |
Number of Terminals | 28 |
Number of Words | 64 words |
Number of Words Code | 64 |
Operating Mode | ASYNCHRONOUS |
Operating Temperature-Max | 85 Cel |
Operating Temperature-Min | -40 Cel |
Organization | 64X9 |
Output Characteristics | 3-STATE |
Output Enable | YES |
Package Body Material | PLASTIC/EPOXY |
Package Code | DIP |
Package Equivalence Code | DIP28,.6 |
Package Shape | RECTANGULAR |
Package Style | IN-LINE Meter |
Parallel/Serial | PARALLEL |
Power Supplies | 5 V |
Qualification Status | Not Qualified |
Seated Height-Max | 5.334 mm |
Standby Current-Max | 0.15 Amp |
Sub Category | FIFOs |
Supply Current-Max | 0.15 mA |
Supply Voltage-Max (Vsup) | 5.5 V |
Supply Voltage-Min (Vsup) | 4.5 V |
Supply Voltage-Nom (Vsup) | 5 V |
Surface Mount | NO |
Technology | CMOS |
Temperature Grade | INDUSTRIAL |
Terminal Finish | TIN LEAD |
Terminal Form | THROUGH-HOLE |
Terminal Pitch | 2.54 mm |
Terminal Position | DUAL |
Width | 15.24 mm |
会社名称 | Fairchild Semiconductor Corporation |
---|---|
設立 | 1957 |
所在地 | 3030 Orchard Parkway San Jose, CA 95134 United States |
URL | http://www.fairchildsemi.com/ |
74ACT2708PC - FAIRCHILD の商品詳細ページです。