74ACT138SJ データシート Fairchild

74ACT138SJ - FAIRCHILD の商品詳細ページです。

1
No Image
2営業日以内に回答いたします

Advanced CMOSロジックIC|パッケージ: Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74ACT138SJ の詳細情報

  • 仕様・詳細
  • メーカー情報
型番74ACT138SJ
メーカーFAIRCHILD
種別Advanced CMOSロジックIC
データシートProduct_list_pdf
Additional Feature 3 ENABLE INPUTS
Family ACT
Input Conditioning STANDARD
JESD-30 Code R-PDSO-G16
JESD-609 Code e3
Length 10.11 mm
Load Capacitance (CL) 50 pF
Logic IC Type OTHER DECODER/DRIVER
Max I(ol) 0.024 Amp
Moisture Sensitivity Level 1
Number of Functions 1
Number of Terminals 16
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Output Polarity INVERTED
Package Body Material PLASTIC/EPOXY
Package Code SOP
Package Equivalence Code SOP16,.3
Package Shape RECTANGULAR
Package Style SMALL OUTLINE Meter
Packing Method TR
Peak Reflow Temperature (Cel) 260
Power Supplies 5 V
Prop. Delay@Nom-Sup 11.5 ns
Propagation Delay (tpd) 11.5 ns
Qualification Status Not Qualified
Seated Height-Max 2.1 mm
Sub Category Decoder/Drivers
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 4.5 V
Supply Voltage-Nom (Vsup) 5 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 1.27 mm
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 5.3 mm
会社名称Fairchild Semiconductor Corporation
設立1957
所在地3030 Orchard Parkway San Jose, CA 95134 United States
URLhttp://www.fairchildsemi.com/

74ACT138SJのレビュー

74ACT138SJ のご注文について