CY7C342B30RI Cypress

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CY7C342B30RI の詳細情報

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型番CY7C342B30RI
メーカーCYPRESS
Additional Feature LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Clock Frequency-Max 27.7 MHz
In-System Programmable NO
JESD-30 Code S-CPGA-P68
JESD-609 Code e0
JTAG BST NO
Length 27.9527 mm
Number of Dedicated Inputs 7
Number of I/O Lines 52
Number of Macro Cells 128
Number of Terminals 68
Operating Temperature-Max 85 Cel
Operating Temperature-Min -40 Cel
Organization 7 DEDICATED INPUTS, 52 I/O
Output Function MACROCELL
Package Body Material CERAMIC, METAL-SEALED COFIRED
Package Code WPGA
Package Equivalence Code PGA68,11X11
Package Shape SQUARE
Package Style GRID ARRAY, WINDOW Meter
Power Supplies 5 V
Programmable Logic Type UV PLD
Propagation Delay 60 ns
Qualification Status Not Qualified
Seated Height-Max 5.08 mm
Sub Category Programmable Logic Devices
Supply Voltage-Max 5.5 V
Supply Voltage-Min 4.5 V
Supply Voltage-Nom 5 V
Surface Mount NO
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish TIN LEAD
Terminal Form PIN/PEG
Terminal Pitch 2.54 mm
Terminal Position PERPENDICULAR
Width 27.9527 mm
会社名称Cypress Semiconductor Corporation.
所在地198 Champion Court San Jose, CA 95134 USA
URLhttp://www.cypress.com/

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