TS68020MR25 データシート Atmel

TS68020MR25 - ATMEL の商品詳細ページです。

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TS68020MR25 の詳細情報

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型番TS68020MR25
メーカーATMEL
データシートProduct_list_pdf
Address Bus Width 32
Bit Size 32
Boundary Scan NO
Clock Frequency-Max 25 MHz
External Data Bus Width 32
Format FIXED POINT
Integrated Cache YES
JESD-30 Code S-CPGA-P114
JESD-609 Code e0
Length 34.54 mm
Low Power Mode NO
Number of Terminals 114
Operating Temperature-Max 125 Cel
Operating Temperature-Min -55 Cel
Package Body Material CERAMIC
Package Code PGA
Package Equivalence Code PGA114,13X13MOD
Package Shape SQUARE
Package Style GRID ARRAY Meter
Power Supplies 5 V
Qualification Status Not Qualified
Seated Height-Max 4.75 mm
Speed 25 rpm
Sub Category Microprocessors
Supply Current-Max 333 mA
Supply Voltage-Max 5.5 V
Supply Voltage-Min 4.5 V
Supply Voltage-Nom 5 V
Surface Mount NO
Technology CMOS
Temperature Grade MILITARY
Terminal Finish Gold (Au)
Terminal Form PIN/PEG
Terminal Pitch 2.54 mm
Terminal Position PERPENDICULAR
Width 34.54 mm
uPs/uCs/Peripheral ICs Type MICROPROCESSOR
会社名称Atmel Corporation
設立1984
所在地1600 Technology Drive　San Jose, 95110 United States
URLhttp://www.atmel.com/

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