型番 | EPM5064LC-2 |
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メーカー | ALTERA |
データシート | ![]() |
Additional Feature | LABS INTERCONNECTED BY PIA; 4 LABS; 64 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK |
Clock Frequency-Max | 40 MHz |
In-System Programmable | NO |
JESD-30 Code | S-PQCC-J44 |
JESD-609 Code | e0 |
JTAG BST | NO |
Number of Dedicated Inputs | 7 |
Number of I/O Lines | 28 |
Number of Macro Cells | 64 |
Number of Terminals | 44 |
Operating Temperature-Max | 70 Cel |
Operating Temperature-Min | 0 Cel |
Organization | 7 DEDICATED INPUTS, 28 I/O |
Output Function | MACROCELL |
Package Body Material | PLASTIC/EPOXY |
Package Code | QCCJ |
Package Equivalence Code | LDCC44,.7SQ |
Package Shape | SQUARE |
Package Style | CHIP CARRIER Meter |
Peak Reflow Temperature (Cel) | 220 |
Power Supplies | 5 V |
Programmable Logic Type | OT PLD |
Propagation Delay | 45 ns |
Qualification Status | Not Qualified |
Sub Category | Programmable Logic Devices |
Supply Voltage-Max | 5.25 V |
Supply Voltage-Min | 4.75 V |
Supply Voltage-Nom | 5 V |
Surface Mount | YES |
Technology | CMOS |
Temperature Grade | COMMERCIAL |
Terminal Finish | TIN LEAD |
Terminal Form | J BEND |
Terminal Pitch | 1.27 mm |
Terminal Position | QUAD |
会社名称 | アルテラ |
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設立 | 1983 |
所在地 | 101 Innovation Drive San Jose, CA 95134 United States |
URL | http://www.altera.com/ |
EPM5064LC-2 - ALTERA の商品詳細ページです。