| 型番 | EPF10K100GC503-3 |
|---|
| メーカー | ALTERA |
|---|
| データシート |  |
| Additional Feature |
4992 LOGIC ELEMENTS; CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V |
| Clock Frequency-Max |
54.1 MHz |
| JESD-30 Code |
S-CPGA-P503 |
| JESD-609 Code |
e0 |
| Length |
57.4 mm |
| Moisture Sensitivity Level |
1 |
| Number of Dedicated Inputs |
4 |
| Number of I/O Lines |
406 |
| Number of Inputs |
406 |
| Number of Logic Cells |
4992 |
| Number of Outputs |
406 |
| Number of Terminals |
503 |
| Operating Temperature-Max |
70 Cel |
| Operating Temperature-Min |
0 Cel |
| Organization |
4 DEDICATED INPUTS, 406 I/O |
| Output Function |
REGISTERED |
| Package Body Material |
CERAMIC, METAL-SEALED COFIRED |
| Package Code |
IPGA |
| Package Equivalence Code |
SPGA503,43X43 |
| Package Shape |
SQUARE |
| Package Style |
GRID ARRAY, INTERSTITIAL PITCH Meter |
| Peak Reflow Temperature (Cel) |
220 |
| Power Supplies |
3.3/5,5 V |
| Programmable Logic Type |
LOADABLE PLD |
| Propagation Delay |
0.5 ns |
| Qualification Status |
Not Qualified |
| Seated Height-Max |
5.077 mm |
| Sub Category |
Field Programmable Gate Arrays |
| Supply Voltage-Max |
5.25 V |
| Supply Voltage-Min |
4.75 V |
| Supply Voltage-Nom |
5 V |
| Surface Mount |
NO |
| Technology |
CMOS |
| Temperature Grade |
COMMERCIAL |
| Terminal Finish |
TIN LEAD |
| Terminal Form |
PIN/PEG |
| Terminal Pitch |
2.54 mm |
| Terminal Position |
PERPENDICULAR |
| Width |
57.4 mm |
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