型番 | EP910DC30 |
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メーカー | ALTERA |
データシート | ![]() |
Additional Feature | 24 MACROCELL; CONFIGURABLE I/O |
Architecture | PAL-TYPE |
Clock Frequency-Max | 33.3 MHz |
JESD-30 Code | R-CDIP-T40 |
JESD-609 Code | e0 |
Number of Dedicated Inputs | 12 |
Number of I/O Lines | 24 |
Number of Inputs | 36 |
Number of Outputs | 24 |
Number of Product Terms | 240 |
Number of Terminals | 40 |
Operating Temperature-Max | 70 Cel |
Operating Temperature-Min | 0 Cel |
Organization | 12 DEDICATED INPUTS, 24 I/O |
Output Function | MACROCELL |
Package Body Material | CERAMIC, GLASS-SEALED |
Package Code | DIP |
Package Equivalence Code | DIP40,.6 |
Package Shape | RECTANGULAR |
Package Style | IN-LINE Meter |
Peak Reflow Temperature (Cel) | 220 |
Power Supplies | 5 V |
Programmable Logic Type | UV PLD |
Propagation Delay | 33 ns |
Qualification Status | Not Qualified |
Sub Category | Programmable Logic Devices |
Supply Voltage-Max | 5.25 V |
Supply Voltage-Min | 4.75 V |
Supply Voltage-Nom | 5 V |
Surface Mount | NO |
Technology | CMOS |
Temperature Grade | COMMERCIAL |
Terminal Finish | TIN LEAD |
Terminal Form | THROUGH-HOLE |
Terminal Pitch | 2.54 mm |
Terminal Position | DUAL |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
会社名称 | アルテラ |
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設立 | 1983 |
所在地 | 101 Innovation Drive San Jose, CA 95134 United States |
URL | http://www.altera.com/ |
EP910DC30 - ALTERA の商品詳細ページです。