EP2AGX45DF25I5N データシート Altera

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EP2AGX45DF25I5N の詳細情報

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型番EP2AGX45DF25I5N
メーカーALTERA
データシートProduct_list_pdf
Clock Frequency-Max 500 MHz
JESD-30 Code S-PBGA-B572
JESD-609 Code e1
Length 25 mm
Moisture Sensitivity Level 3
Number of CLBs 1805
Number of Inputs 252
Number of Logic Cells 42959
Number of Outputs 252
Number of Terminals 572
Operating Temperature-Max 100 Cel
Operating Temperature-Min -40 Cel
Organization 1805 CLBS
Package Body Material PLASTIC/EPOXY
Package Code HBGA
Package Equivalence Code BGA572,24X24,40
Package Shape SQUARE
Package Style GRID ARRAY, HEAT SINK/SLUG Meter
Peak Reflow Temperature (Cel) 260
Power Supplies 0.9,1.2/3.3,1.5,2.5 V
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Qualification Status Not Qualified
Seated Height-Max 2.2 mm
Sub Category Field Programmable Gate Arrays
Supply Voltage-Max 0.93 V
Supply Voltage-Min 0.87 V
Supply Voltage-Nom .9 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish TIN SILVER COPPER
Terminal Form BALL
Terminal Pitch 1 mm
Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) 30
Width 25 mm
会社名称アルテラ
設立1983
所在地101 Innovation Drive San Jose, CA 95134 United States
URLhttp://www.altera.com/

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