EP20K60EQC208-2XN データシート Altera

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EP20K60EQC208-2XN
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EP20K60EQC208-2XN の詳細情報

  • 仕様・詳細
  • メーカー情報
型番EP20K60EQC208-2XN
メーカーALTERA
データシートProduct_list_pdf
Clock Frequency-Max 160 MHz
JESD-30 Code S-PQFP-G208
JESD-609 Code e3
Length 28 mm
Moisture Sensitivity Level 3
Number of Dedicated Inputs 4
Number of I/O Lines 148
Number of Inputs 140
Number of Logic Cells 2560
Number of Outputs 140
Number of Terminals 208
Operating Temperature-Max 85 Cel
Operating Temperature-Min 0 Cel
Organization 4 DEDICATED INPUTS, 148 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code FQFP
Package Equivalence Code QFP208,1.2SQ,20
Package Shape SQUARE
Package Style FLATPACK, FINE PITCH Meter
Peak Reflow Temperature (Cel) 245
Power Supplies 1.8,1.8/3.3 V
Programmable Logic Type LOADABLE PLD
Propagation Delay 2.41 ns
Qualification Status Not Qualified
Seated Height-Max 4.1 mm
Sub Category Field Programmable Gate Arrays
Supply Voltage-Max 1.89 V
Supply Voltage-Min 1.71 V
Supply Voltage-Nom 1.8 V
Surface Mount YES
Technology CMOS
Temperature Grade OTHER
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 0.5 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 30
Width 28 mm
会社名称アルテラ
設立1983
所在地101 Innovation Drive San Jose, CA 95134 United States
URLhttp://www.altera.com/

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