EP20K300EFC672-3N データシート Altera

EP20K300EFC672-3N - ALTERA の商品詳細ページです。

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EP20K300EFC672-3N の詳細情報

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型番EP20K300EFC672-3N
メーカーALTERA
データシートProduct_list_pdf
Clock Frequency-Max 160 MHz
JESD-30 Code S-PBGA-B672
JESD-609 Code e1
Length 27 mm
Moisture Sensitivity Level 3
Number of Dedicated Inputs 4
Number of I/O Lines 408
Number of Inputs 400
Number of Logic Cells 11520
Number of Outputs 400
Number of Terminals 672
Operating Temperature-Max 85 Cel
Operating Temperature-Min 0 Cel
Organization 4 DEDICATED INPUTS, 408 I/O
Output Function MACROCELL
Package Body Material PLASTIC/EPOXY
Package Code BGA
Package Equivalence Code BGA672,26X26,40
Package Shape SQUARE
Package Style GRID ARRAY Meter
Peak Reflow Temperature (Cel) 260
Power Supplies 1.8,1.8/3.3 V
Programmable Logic Type LOADABLE PLD
Propagation Delay 3.06 ns
Qualification Status Not Qualified
Seated Height-Max 3.5 mm
Sub Category Field Programmable Gate Arrays
Supply Voltage-Max 1.89 V
Supply Voltage-Min 1.71 V
Supply Voltage-Nom 1.8 V
Surface Mount YES
Technology CMOS
Temperature Grade OTHER
Terminal Finish TIN SILVER COPPER
Terminal Form BALL
Terminal Pitch 1 mm
Terminal Position BOTTOM
Time@Peak Reflow Temperature-Max (s) 30
Width 27 mm
会社名称アルテラ
設立1983
所在地101 Innovation Drive San Jose, CA 95134 United States
URLhttp://www.altera.com/

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