EP1K10QC208-2 データシート Altera

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EP1K10QC208-2 の詳細情報

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型番EP1K10QC208-2
メーカーALTERA
データシートProduct_list_pdf
Clock Frequency-Max 37.5 MHz
JESD-30 Code S-PQFP-G208
JESD-609 Code e0
Length 28 mm
Moisture Sensitivity Level 3
Number of I/O Lines 120
Number of Inputs 120
Number of Logic Cells 576
Number of Outputs 120
Number of Terminals 208
Operating Temperature-Max 70 Cel
Operating Temperature-Min 0 Cel
Organization 120 I/O
Output Function MIXED
Package Body Material PLASTIC/EPOXY
Package Code FQFP
Package Equivalence Code QFP208,1.2SQ,20
Package Shape SQUARE
Package Style FLATPACK Meter
Peak Reflow Temperature (Cel) 220
Power Supplies 2.5,2.5/3.3 V
Programmable Logic Type FIELD PROGRAMMABLE GATE ARRAY
Propagation Delay 0.5 ns
Qualification Status Not Qualified
Seated Height-Max 4.1 mm
Sub Category Field Programmable Gate Arrays
Supply Voltage-Max 2.625 V
Supply Voltage-Min 2.375 V
Supply Voltage-Nom 2.5 V
Surface Mount YES
Technology CMOS
Temperature Grade COMMERCIAL
Terminal Finish MATTE TIN
Terminal Form GULL WING
Terminal Pitch 0.5 mm
Terminal Position QUAD
Time@Peak Reflow Temperature-Max (s) 20
Width 28 mm
会社名称アルテラ
設立1983
所在地101 Innovation Drive San Jose, CA 95134 United States
URLhttp://www.altera.com/

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